Browsing by Author "Vourkas, Ioannis"

Now showing 1 - 10 of 10
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    1-D memristor-based cellular automaton for pseudo-random number generation
    (IEEE, 2017) Karamani, Rafailia Eleni; Ntinas, Vasileios; Vourkas, Ioannis; Sirakoulis, Georgios C.
    Cellular Automata (CAs) is a well-known parallel, bio-inspired, computational model. It is based on the capability of simpler, locally interacting units, i.e. the CAs cells, to evolve in time, giving rise to emergent computation, suitable to model physical system behavior, prediction of natural phenomena and multi-dimensional problem solutions. Moreover, at the same time CAs constitute a promising computing platform, beyond the von Neumann architecture. In this paper, a memristor device is considered to be the basic module of a CA cell circuit implementation, performing as a combined memory and processing element to implement CA-based circuits, able to model sufficiently systems and applications as mentioned above, targeting tentatively to a more energy efficient design compared to the conventional electronics. In particular and as a proof of concept, the results of elementary CAs modeling and simulation for the generation of pseudo-random numbers are presented using a 1-D memristor-based CAs array to illustrate the robustness and the efficacy of the proposed computing approach.
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    2T1M-based double memristive crossbar architecture for in-memory computing
    (2016) Vourkas, Ioannis; Papandroulidakis, Georgios; Sirakoulis, Georgios Ch.; Abusleme Hoffman, Ángel Christian
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    A Digital Memristor Emulator for FPGA-Based Artificial Neural Networks
    (IEEE, 2016) Vourkas, Ioannis; Abusleme Hoffman, Ángel Christian; Ntinas, Vasileios; Sirakoulis, Georgios C.; Rubio, Antonio
    FPGAs are reconfigurable electronic platforms, well-suited to implement complex artificial neural networks (ANNs). To this end, the compact hardware (HW) implementation of artificial synapses is an important step to obtain human brain-like functionalities at circuit-level. In this context, the memristor has been proposed as the electronic analogue of biological synapses, but the price of commercially available samples still remains high, hence motivating the development of HW emulators. In this work we present the first digital memristor emulator based upon a voltage-controlled threshold-type bipolar memristor model. We validate its functionality in low-cost yet powerful FPGA families. We test its suitability for complex memristive circuits and prove its synaptic properties in a small associative memory via a perceptron ANN.
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    An on-line test strategy and analysis for a 1T1R crossbar memory
    (IEEE, 2017) Escudero-Lopez, M.; Moll, F.; Rubio, A.; Vourkas, Ioannis
    Memristors are emerging devices known by their nonvolability, compatibility with CMOS processes and high density in circuits density in circuits mostly owing to the crossbar nanoarchitecture. One of their most notable applications is in the memory system field. Despite their promising characteristics and the advancements in this emerging technology, variability and reliability are still principal issues for memristors. For these reasons, exploring techniques that check the integrity of circuits is of primary importance. Therefore, this paper proposes a method to perform an on-line test capable to detect a single failure inside the memory crossbar array.
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    Crossbar-Based Memristive Logic-in-Memory Architecture
    (2017) Papandroulidakis, Georgios; Vourkas, Ioannis; Abusleme Hoffman, Ángel Christian; Georgios, Ch.; Sirakoulis, Antonio Rubio
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    Experience on material implication computing with an electromechanical memristor emulator
    (IEEE, 2016) Zuin, S.; Escudero López, M.; Moll, F.; Rubio, A.; Vourkas, Ioannis; Sirakoulis, G. C.
    Memristors are being considered as a promising emerging device able to introduce new paradigms in both data storage and computing. In this paper the authors introduce the concept of a quasi-ideal experimental device that emulates the fundamental behavior of a memristor based on an electromechanical organization. By using this emulator, results about the experimental implementation of an unconventional material implication-based data-path equivalent to the i-4004 are presented and experimentally demonstrated. The use of the proposed quasi-ideal device allows the evaluation of this new computing paradigm, based on the resistance domain, without incorporating the disturbance of process and cycle to cycle variabilities observed in real nowadays devices that cause a limit in yield and behavior.
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    Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator
    (2018) Ntinas, Vasileios; Vourkas, Ioannis; Abusleme Hoffman, Ángel Christian; Sirakoulis Georgios Ch.; Rubio, Antonio
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    Exploring the voltage divider approach for accurate memristor state tuning
    (IEEE, 2017) Vourkas, Ioannis; Gómez Luna, Jorge Antonio; Abusleme Hoffman, Ángel Christian; Vasileiadis, Nikolaos; Sirakoulis, Georgios C.; Rubio, Antonio
    The maximum exploitation of the favorable properties and the analog nature of memristor technology in future nonvolatile resistive memories, requires accurate multi-level programming. In this direction, we explore the voltage divider (VD) approach for highly controllable multi-state SET memristor tuning. We present the theoretical basis of operation, the main advantages and weaknesses. We finally propose an improved closed-loop VD SET scheme to tackle the variability effect and achieve <;1% tuning precision, on average 3x faster than another accurate tuning algorithm of the recent literature.
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    Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations
    (2017) Ntinas, V.; Vourkas, Ioannis; Sirakoulis, G.; Adamatzky, A.
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    Voltage Divider for Self-Limited Analog State Programing of Memristors
    (IEEE, 2020) Vourkas, Ioannis; Gómez, Jorge; Abusleme Hoffman, Ángel Christian; Sirakoulis, Georgios Ch.; Rubio, Antonio
    Resistive switching devices −memristors −present a tunable, incremental switching behavior. Tuning their state accurately, repeatedly and in a wide range, makes memristors well-suited for multi-level (ML) resistive memory cells and analog computing applications. In this brief, the tuning approach based on a memristor-resistor voltage divider (VD) is validated here experimentally using commercial memristors from Knowm Inc. and a custom circuit. Rapid and controllable multi-state SET tuning is shown with an appreciable range of different resistance values obtained as a function of the amplitude of the applied voltage pulse. The efficiency of the VD is finally compared against an adaptive pulse-based tuning protocol, in terms of circuit overhead, tuning precision, tuning time, and energy consumption, qualifying as a simple hardware solution for fast, reliable, and energy-efficient ML resistance tuning.