Cascaded Multilevel Converters: Optimal Asymmetries and Floating Capacitor Control
dc.contributor.author | Pereda Torres, Javier Eduardo | |
dc.contributor.author | Dixon, Juan | |
dc.date.accessioned | 2022-05-18T14:04:49Z | |
dc.date.available | 2022-05-18T14:04:49Z | |
dc.date.issued | 2013 | |
dc.description.abstract | Cascaded multilevel (CM) converter is a series connection of several inverters that together generate multiple voltage levels with controllable frequency, phase, and amplitude. Its main advantages are high power, reliability, and power quality. However, it has considerable drawbacks such as high number of components, many isolated power sources, decreasing voltage quality with the modulation index, and regeneration in some series inverters at specific modulation indexes, even when the machine is motoring. The authors propose to improve any CM topology through two solutions: use optimal voltage asymmetries (ratios), higher than conventional ones; replace the voltage sources by floating capacitors balanced with a new control (PI controller) and/or a high-frequency link. This paper presents theoretical analysis and experimental results of CM converters with increased voltage-quality (levels), some of them keeping this high quality and avoiding regeneration in motor mode at any motor operation point, using the proposed voltage asymmetries and simplifying or eliminating some voltage sources. Experimental results show a reduction of components, an improved voltage quality, and a satisfactory behavior in stationary and dynamic operation. | |
dc.fuente.origen | IEEE | |
dc.identifier.doi | 10.1109/TIE.2012.2219834 | |
dc.identifier.eissn | 1557-9948 | |
dc.identifier.issn | 1557-9948 | |
dc.identifier.uri | https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=6339054 | |
dc.identifier.uri | https://doi.org/10.1109/TIE.2012.2219834 | |
dc.identifier.uri | https://repositorio.uc.cl/handle/11534/64109 | |
dc.information.autoruc | Escuela de ingeniería ; Pereda Torres, Javier Eduardo ; S/I ; 131481 | |
dc.information.autoruc | Escuela de ingeniería ; Dixon, Juan ; S/I ; 99537 | |
dc.issue.numero | 11 | |
dc.language.iso | en | |
dc.nota.acceso | Contenido parcial | |
dc.pagina.final | 4793 | |
dc.pagina.inicio | 4784 | |
dc.publisher | IEEE | |
dc.revista | IEEE Transactions on Industrial Electronics | |
dc.rights | acceso restringido | |
dc.subject | Inverters | |
dc.subject | Capacitors | |
dc.subject | Vectors | |
dc.subject | Modulation | |
dc.subject | Topology | |
dc.subject | Voltage control | |
dc.subject | Windings | |
dc.title | Cascaded Multilevel Converters: Optimal Asymmetries and Floating Capacitor Control | es_ES |
dc.type | artículo | |
dc.volumen | 60 | |
sipa.codpersvinculados | 131481 | |
sipa.codpersvinculados | 99537 |
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