Charge-sensitive amplifiers (CSAs), widely used as front-ends in pulse processors for capacitive detectors, require a feedback network to set the operation point, deal with leakage currents and restore the baseline voltage upon the arrival of signals. Passive feedback networks are simple and reliable solutions that accomplish the task, but cannot modify the operation point in order to accommodate an input with different polarity, and do not offer sufficient flexibility to deal with a wide range of leakage current or input rates. The Krummenacher feedback solves these drawbacks at the cost of a large compensation capacitor, which is required for stability purposes. In this work, a novel configurable feedback network is presented. Based on the same principle as the Krummenacher network, this circuit relies on the design parameters to ensure stability. This work shows analysis, design and test results from a recent implementation in a 500-nm CMOS process.
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Autor | Abusleme Hoffman, Ángel Christian Barraza Altamirano, Renzo Ignacio Kuleshov, S. |
Título | A baseline restorer for charge-sensitive amplifiers in a 500-nm CMOS process |
ISSN | 2473-4667 |
ISBN | 9781538623121 |
ISBN electrónico | 9781538623114 |
Fecha de publicación | 2018 |
Resumen | Charge-sensitive amplifiers (CSAs), widely used as front-ends in pulse processors for capacitive detectors, require a feedback network to set the operation point, deal with leakage currents and restore the baseline voltage upon the arrival of signals. Passive feedback networks are simple and reliable solutions that accomplish the task, but cannot modify the operation point in order to accommodate an input with different polarity, and do not offer sufficient flexibility to deal with a wide range of leakage current or input rates. The Krummenacher feedback solves these drawbacks at the cost of a large compensation capacitor, which is required for stability purposes. In this work, a novel configurable feedback network is presented. Based on the same principle as the Krummenacher network, this circuit relies on the design parameters to ensure stability. This work shows analysis, design and test results from a recent implementation in a 500-nm CMOS process. |
Derechos | acceso restringido |
DOI | 10.1109/LASCAS.2018.8399943 |
Editorial | IEEE |
Enlace | https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=8399943 |
Palabra clave | Detectors Mirrors Capacitors Leakage currents Capacitance Circuit stability Stability analysis |
Publicado en / Colección | IEEE Latin American Symposium on Circuits & Systems (LASCAS) (9° : 2018 : Puerto Vallarta, México) |
Tipo de documento | comunicación de congreso |